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ATWILC1000-MR110XB ieee 802.11 b/g/n link controller module description the ATWILC1000-MR110XB module is a low-power consumption ieee 802.11 b/g/n iot (internet of things) module, which is specifically optimized for low power iot applications. this module features small form factor (21.7mm x 14.7mm x 2.1mm) while fully integrating power amplifier (pa), low noise amplifier (lna), transmit/receive (t/r), switch, power management, and pcb antenna. with advanced security, it is interoperable with various vendors using ieee 802.11b/g/n access points in wireless lan. the module provides serial peripheral interface (spi) and secure digital input output (sdio) to interface with the host controller. note that all references to the ATWILC1000-MR110XB module include all the module devices listed below unless otherwise noted: ? atwilc1000-mr110pb ? atwilc1000-mr110ub features ? compliant with ieee 802.11 b/g/n 20 mhz (1x1) solution ? supports single spatial stream in 2.4 ghz ism band ? integrated power amplifier (pa) and transmit/receive (t/r) switch ? superior sensitivity and range through advanced phy signal processing ? advanced equalization and channel estimation ? advanced carrier and timing synchronization ? wi-fi direct ? and soft-ap support ? supports ieee 802.11 wep, wpa, wpa2 and wpa2-enterprise security ? superior medium access control (mac) throughput through hardware accelerated two-level a- msdu/a-mpdu frame aggregation and block acknowledgement ? on-chip memory management engine to reduce the host load ? spi and sdio host interfaces ? operating temperature ranges from -40c to +85c ? input/output operating voltage of 1.8v to 3.6v ? built-in 26 mhz crystal ? power-save modes: C <1a power-down mode typical at 3.3v i/o C 380a doze mode with chip settings preserved (used for beacon monitoring) C on-chip low power sleep oscillator C fast host wake-up from doze mode by a pin or the host i/o transaction ? wi-fi alliance ? certified for connectivity and optimizations ? 2017 microchip technology inc. datasheet ds70005326b-page 1
C id: wfa65340 ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 2
table of contents description.......................................................................................................................1 features.......................................................................................................................... 1 1. ordering information and module marking................................................................ 5 2. block diagram........................................................................................................... 6 3. pinout and package information............................................................................... 7 4. electrical specifications........................................................................................... 11 4.1. absolute ratings........................................................................................................................ 11 4.2. recommended operating conditions........................................................................................ 11 4.3. receiver performance................................................................................................................11 4.4. transmitter performance............................................................................................................13 4.5. timing characteristics................................................................................................................ 14 5. power management................................................................................................ 19 5.1. current consumption in various device states......................................................................... 19 5.2. restrictions for power states..................................................................................................... 20 5.3. power-up/down sequence........................................................................................................ 20 5.4. digital i/o pin behavior during power-up sequences...............................................................21 6. cpu and memory subsystems............................................................................... 23 6.1. processor................................................................................................................................... 23 6.2. memory subsystem....................................................................................................................23 6.3. nonvolatile memory (efuse)...................................................................................................... 23 7. wlan subsystem................................................................................................... 25 7.1. mac........................................................................................................................................... 25 7.2. phy............................................................................................................................................ 26 7.3. radio.......................................................................................................................................... 27 8. external interfaces...................................................................................................28 8.1. interfacing with the host microcontroller.................................................................................... 28 8.2. spi slave interface.....................................................................................................................29 8.3. sdio slave interface..................................................................................................................29 8.4. uart debug interface............................................................................................................... 30 8.5. i 2 c slave interface..................................................................................................................... 31 9. notes on interfacing with the ATWILC1000-MR110XB............................................ 32 10. application reference design................................................................................. 33 11. module outline drawings........................................................................................ 35 12. design consideration.............................................................................................. 38 ? 2017 microchip technology inc. datasheet ds70005326b-page 3
12.1. atwilc1000-mr110pb placement and routing guidelines.................................................... 38 12.2. printed pcb antenna performance of atwilc1000-mr110pb................................................ 39 12.3. atwilc1000-mr110ub placement and routing guidelines.................................................... 42 13. reflow profile information....................................................................................... 44 13.1. storage condition.......................................................................................................................44 13.2. solder paste...............................................................................................................................44 13.3. stencil design............................................................................................................................ 44 13.4. printing process......................................................................................................................... 44 13.5. baking conditions...................................................................................................................... 44 13.6. soldering and reflow condition................................................................................................. 45 14. module assembly considerations........................................................................... 47 15. regulatory approval................................................................................................ 48 15.1. united states..............................................................................................................................48 15.2. canada.......................................................................................................................................50 15.3. europe........................................................................................................................................51 16. reference documentation.......................................................................................53 17. document revision history..................................................................................... 54 the microchip web site................................................................................................ 57 customer change notification service..........................................................................57 customer support......................................................................................................... 57 microchip devices code protection feature................................................................. 57 legal notice...................................................................................................................58 trademarks................................................................................................................... 58 quality management system certified by dnv.............................................................59 worldwide sales and service........................................................................................60 ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 4
1. ordering information and module marking the following table provides the ordering details of the ATWILC1000-MR110XB module. table 1-1.?ordering details model number ordering code package no. of pins description regulatory certification atwilc1000- mr110pb atwilc1000- mr110pb 21.7x14.7x2.1 mm 28 certified module with atwilc1000b- mu chip and pcb antenna fcc, ic, ce atwilc1000- mr110ub atwilc1000- mr110ub 21.7x14.7x2.1 mm 28 certified module with atwilc1000b- mu chip and ufl connector fcc the following figure provides the marking information of the ATWILC1000-MR110XB module. figure 1-1.?marking information ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 5
2. block diagram the following figure provides a basic overview of the ATWILC1000-MR110XB module. figure 2-1.?ATWILC1000-MR110XB module block diagram ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 6
3. pinout and package information the ATWILC1000-MR110XB package has an exposed paddle that must be connected to the system board ground. the module pin assignment is shown in the following figure. figure 3-1.?pin assignment note:? this pin assignment is applicable for both atwilc1000-mr110pb and atwilc1000-mr110ub modules. the following table describes the pin description of this module. table 3-1.?pin details pin no. name type description programmable pull up resistor 1 gpio_6 i/o general purpose i/o. - 2 i 2 c_scl i/o i 2 c slave clock. used only for development debug purposes. it is recommended to add test point for this pin. - 3 i 2 c_sda i/o i 2 c slave data. used only for development debug purposes. it is recommended to add test point for this pin. yes 4 reset_n i active-low hard reset. when this pin is asserted low, the module is placed in the yes ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 7
pin no. name type description programmable pull up resistor reset state. when this pin is asserted high, the module is out of reset and functions normally. connect to a host output that defaults low at power-up. if the host output is tri-stated, add a 1 m? pull down resistor to ensure a low level at power-up. 5 nc C no connection - 6 nc C no connection - 7 nc C no connection - 8 nc C no connection - 9 gnd_1 ground - - 10 sdio_spi_cfg i connect to vddio through a 1m? resistor to enable the spi interface. connect to ground to enable sdio interface. no 11 wake i host wake control. no 12 gnd_2 ground - - 13 irqn o the ATWILC1000-MR110XB device interrupt output. connect to a host interrupt pin. no 14 sd_dat3 sdio=i/ o uart= o sdio data line 3 from the atwilc1000- mr110xb when module is configured for sdio. yes 15 sd_dat2/ spi_rxd sdio=i/ o spi=i sdio data line 2 signal from ATWILC1000-MR110XB when module is configured for sdio. spi mosi (master out slave in) pin when module is configured for spi. yes 16 sd_dat1/ spi_ssn sdio=i/ o spi=i sdio data line 1 from atwilc1000- mr110xb when module is configured for sdio. active low spi slave select from the atwilc1000 when module is configured for spi. yes 17 sd_dat0/ spi_txd sdio=i/ o spi=o sdio data line 0 from the atwilc1000- mr110xb when module is configured for sdio. spi miso (master in slave out) pin from atwilc1000 when module is configured for spi. yes 18 sd_cmd/ spi_clk sdio=i/ o sdio cmd line from atwilc1000- mr110xb when module is configured for yes ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 8
pin no. name type description programmable pull up resistor spi=i sdio. spi clock from atwilc1000 when module is configured for spi. 19 sd_clk sdio=i uart=i sdio clock line for the atwilc1000- mr110xb when module is configured for sdio. yes 20 vbatt power supply power supply pin for the dc/dc convertor yes 21 gpio_1 i/o general purpose i/o yes 22 chip_en i module enable. high level enables module, low level places module in power-down mode. connect to a host output that defaults low at power-up. if the host output is tri-stated, add a 1m? pull down resistor if necessary to ensure a low level at power- up. no 23 vddio power supply i/o power supply. must match host i/o voltage. - 24 1p3v_tp - 1.3v vdd core test point. decouple with 10uf and 0.01uf to gnd 25 gpio_3 i/o general purpose i/o. by default, uart receive input to ATWILC1000-MR110XB. used only for development debug purposes. it is recommended to add test point for this pin. yes 26 gpio_4 i/o general purpose i/o. yes 27 gpio_5 i/o general purpose i/o. by default, uart transmit output from atwilc1000- mr110xb. used only for development debug purposes. it is recommended to add test point for this pin. yes 28 gnd_3 ground - - 29 paddle ground exposed paddle gnd. this pad must be soldered to system ground - the following table provides the ATWILC1000-MR110XB module package dimensions table 3-2.?ATWILC1000-MR110XB module package information parameter value units package size 21.72 x 14.73 mm pad count 28 - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 9
parameter value units total thickness 2.11 mm pad pitch 1.016 pad width 0.82 exposed pad size 3.7 x 3.7 ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 10
4. electrical specifications 4.1 absolute ratings the absolute maximum ratings for this module are listed in the following table. table 4-1.?ATWILC1000-MR110XB module absolute maximum ratings symbol description min. max. unit vbatt input supply voltage -0.3 5.0 v vddio i/o voltage -0.3 5.0 v caution:? stresses beyond those listed under "absolute maximum ratings" cause permanent damage to the device. this is a stress rating only. the functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods affects the device reliability. 4.2 recommended operating conditions the recommended operating conditions for this module is listed in the following table. table 4-2.?ATWILC1000-MR110XB module recommended operating conditions symbol min. typ. max. unit vbatt 3.0 3.3 4.2 v vddio 1.8 3.3 3.6 v operating temperature -40 +85 oc note:? 1. vbatt should be equal to or greater than vddio. 2. the voltage of vddio is dependent on system i/o voltage. 3. test conditions: -40oc to +85oc 4.3 receiver performance the following are typical conditions for radio receiver performance: vbatt at 3.3 v; vddio at 3.3v; temperature at 25c and wlan channel 6(2437 mhz). the following table provides the receiver performance characteristics for this module. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 11
table 4-3.?receiver performance parameter description min. typ. max. unit frequency - 2,412 - 2,472 mhz sensitivity 802.11b 1 mbps dsss - -94 - dbm 2 mbps dsss - -91 - 5.5 mbps dsss - -89 - 11 mbps dsss - -86 - sensitivity 802.11g 6 mbps ofdm - -88 - dbm 9 mbps ofdm - -87 - 12 mbps ofdm - -86 - 18 mbps ofdm - -84 - 24 mbps ofdm - -82 - 36 mbps ofdm - -78 - 48 mbps ofdm - -74 - 54 mbps ofdm - -73 - sensitivity 802.11n (bw at 20 mhz) mcs 0 - -87 - dbm mcs 1 - -85 - mcs 2 - -83 - mcs 3 - -80 - mcs 4 - -76 - mcs 5 - -73 - mcs 6 - -71 - mcs 7 - -69 - maximum receive signal level 1-11 mbps dsss 0 - dbm 6-54 mbps ofdm -5 - mcs 0 C 7 -5 - adjacent channel rejection 1 mbps dsss (30 mhz offset) - 50 - db 11 mbps dsss (25 mhz offset) - 43 - 6 mbps ofdm (25 mhz offset) - 40 - 54 mbps ofdm (25 mhz offset) - 25 - mcs 0 C 20 mhz bw (25 mhz offset) - 40 - mcs 7 C 20 mhz bw (25 mhz offset) - 20 - cellular blocker immunity 776-794 mhz cdma - -14 - dbm 824-849 mhz gsm - -10 - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 12
parameter description min. typ. max. unit 880-915 mhz gsm - -10 - 1710-1785 mhz gsm - -15 - 1850-1910 mhz gsm - -15 - 1850-1910 mhz wcdma - -24 - 1920-1980 mhz wcdma - -24 - 4.4 transmitter performance the following are typical conditions for radio transmitter performance: vbatt at 3.3 v; vddio at 3.3v; temperature at 25c and wlan channel 6(2437 mhz). the following table provides the transmitter performance characteristics for this module. table 4-4.?transmitter performance parameter description unit minimum typical maximum frequency - mhz 2,412 - 2,472 output power 1-2 , on_transmit 802.11b 1mbps dbm - 17.6 - 802.11b 11mbps dbm - 18.2 - 802.11g 6mbps dbm - 18.7 - 802.11g 54mbps dbm - 16.7 - 802.11n mcs 0 dbm - 17.3 - 802.11n mcs 7 dbm - 13.8 - tx power accuracy - db - 1.5 2 - carrier suppression 802.11b mode dbc - -19.4 - 802.11g mode dbc - -27.5 - 802.11n mode dbc - -21.1 - out of band transmit power 76-108 dbm/hz - -125 - 776-794 dbm/hz - -125 - 869-960 dbm/hz - -125 - 925-960 dbm/hz - -125 - 1570-1580 dbm/hz - -125 - 1805-1880 dbm/hz - -125 - 1930-1990 dbm/hz - -125 - 2110-2170 dbm/hz - -125 - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 13
parameter description unit minimum typical maximum harmonic output power 4 2 nd dbm/mhz - -28 - 3 rd dbm/mhz - -33 - 4 th dbm/mhz - -40 - 5 th dbm/mhz - -28 - note:? 1. measured at 802.11 spec compliant evm/spectral mask 2. measured after rf matching network 3. operating temperature range is -40c to +85c. rf performance is guaranteed at room temperature of 25c with a 2-3db change at boundary conditions. 4. measured at 11mbps, dg(digital gain)= -7, wlan channel 6 (2437 mhz). 5. with respect to tx power, different (higher/lower) rf output power settings may be used for specific antennas and/or enclosures, in which case recertification may be required. 6. the availability of some specific channels and/or operational frequency bands are country dependent and should be programmed at the host product factory to match the intended destination. regulatory bodies prohibit exposing the settings to the end user. this requirement needs to be taken care of via host implementation. 4.5 timing characteristics 4.5.1 spi timing the spi slave interface supports four standard modes as determined by the clock polarity (cpol) and clock phase (cpha) settings. these modes are illustrated in the following table. table 4-5.?spi slave modes mode cpol cpha 0 0 0 1 0 1 2 1 0 3 1 1 the red lines in the following figure correspond to clock phase at 0 and the blue lines correspond to clock phase at 1. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 14
figure 4-1.?spi slave clock polarity and clock phase timing z z z z sck cpol = 0 cpol = 1 ssn rxd / txd ( mosi / miso ) cpha = 0 cpha = 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 1 8 the spi timing is shown in the following figure. figure 4-2.?spi timing diagram (spi mode cpol=0, cpha=0) the spi timing parameters are provided in the following table. table 4-6.?spi slave timing parameters 1 parameter symbol min. max. units clock input frequency 2 f sck - 48 mhz clock low pulse width t wl 4 - ns clock high pulse width t wh 5 - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 15
parameter symbol min. max. units clock rise time t lh 0 7 clock fall time t hl 0 7 txd output delay 3 t odly 4 9 from sck fall 12.5 from sck rise rxd input setup time t isu 1 - rxd input hold time t ihd 5 - ssn input setup time t sussn 3 - ssn input hold time t hdssn 5.5 - note:? 1. timing is applicable to all spi modes. 2. maximum clock frequency specified is limited by the spi slave interface internal design; actual maximum clock frequency can be lower and depends on the specific pcb layout. 3. timing is based on 15pf output loading. 4.5.2 sdio timing the sdio slave interface timing is shown in following figure. figure 4-3.?sdio timing diagram slave timing parameters are provided in the following table. table 4-7.?sdio timing parameters parameter symbol min max units clock input frequency 1 f pp 0 50 mhz clock low pulse width t wl 9 - ns ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 16
parameter symbol min max units clock high pulse width t wh 4.5 - clock rise time t lh 0 5 clock fall time t hl 0 5 input setup time t isu 6 - input hold time t ih 4 - output delay 2 t odly 3 11 1. maximum clock frequency specified is limited by the sdio slave interface internal design; actual maximum clock frequency can be lower and depends on the specific pcb layout. 2. timing based on 15pf output loading. 4.5.3 i 2 c timing the following figure illustrates i 2 c slave timing. figure 4-4.?i 2 c timing diagram the following table provides i 2 c slave timing parameters. table 4-8.?i2c timing parameters parameter symbol min max units remarks scl clock frequency f scl 0 400 khz - scl low pulse width t wl 1.3 - s - scl high pulse width t wh 0.6 - s - scl, sda fall time t hl - 300 ns - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 17
parameter symbol min max units remarks scl, sda rise time t lh - 300 ns this is dictated by external components start setup time t susta 0.6 - s - start hold time t hdsta 0.6 - s - sda setup time t sudat 100 - ns - sda hold time t hddat 0 - ns slave and master default master programming option 40 - ns stop setup time t susto 0.6 - s - bus free time between stop and start t buf 1.3 - s - glitch pulse reject t pr 0 50 ns - ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 18
5. power management the ATWILC1000-MR110XB module has several device states: ? on states: C on_transmit C device actively transmits an 802.11 signal. highest output power and nominal current consumption. C on_receive C device actively receivies an 802.11 signal. lowest sensitivity and nominal current consumption. C on_doze C device is powered on but it does not actively transmit or receive the data. C power_down C device core supply is powered off. the following pins are used to switch between the on and power_down states: ? chip_en C this pin (pin 22) enables or disables the dc/dc converter. ? vddio C i/o supply voltage from external supply. in the on states, vddio is on and chip_en is high (at vddio voltage level). to change from the on states to power_down state, connect the resetn and chip_en pin to logic low (gnd) by following the power down sequence mentioned in power-up/down sequence . when vddio is off and chip_en is low, the chip is powered off with no leakage (also see restrictions for power states ). 5.1 current consumption in various device states the following table provides this module's current consumption in various device states. table 5-1.?current consumption device state code rate output power (dbm) current consumption 1 i vbatt i vddio on_transmit 802.11b 1mbps 17.6 266 ma 22 ma 802.11b 11mbps 18.5 239 ma 22 ma 802.11g 6mbps 18.6 249 ma 22 ma 802.11g 54mbps 16.9 173 ma 22 ma 802.11n mcs 0 17.7 253 ma 22 ma 802.11n mcs 7 14.0 164 ma 22 ma on_receive 802.11b 1mbps n/a 63 ma 22 ma 802.11b 11mbps n/a 63 ma 22 ma 802.11g 6mbps n/a 63 ma 22 ma 802.11g 54mbps n/a 63 ma 22 ma 802.11n mcs 0 n/a 63 ma 22 ma 802.11n mcs 7 n/a 63 ma 22 ma ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 19
device state code rate output power (dbm) current consumption 1 on_doze n/a n/a 380a <10a power_down n/a n/a 1.25 ua (2) note:? 1. the power consumption values are measured when vbat is 3.3v and vddio is 3.3v at 25c. 2. current consumption mentioned for these states is the sum of current consumed in vddio and vbat voltage rails. 5.2 restrictions for power states when no power is supplied to the device, the dc/dc converter output and vddio are both turned off (at ground potential). in this case, a voltage cannot be applied to the device pins because each pin contains an esd diode from the pin to supply. this diode will turn on when voltage higher than one diode-drop is supplied to the pin. if a voltage must be applied to the signal pads while the chip is in a low power state, the vddio supply must be on, so the sleep mode or power-down state must be used. similarly, to prevent the pin-to-ground diode from turning on, do not apply a voltage that is more than one diode-drop below ground to any pin. 5.3 power-up/down sequence the following figure illustrates the power-up/down sequence for the ATWILC1000-MR110XB module. figure 5-1.? power-up/down sequence the following table provides power-up/down sequence timing parameters. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 20
table 5-2.? power-up/down sequence timing parameter min. max. units description notes t a 0 - ms vbat rise to vddio rise vbat and vddio can rise simultaneously or connected together. vddio must not rise before vbat. t b 0 - ms vddio rise to chip_en rise chip_en must not rise before vddio. chip_en must be driven high or low and must not be left floating. t c 5 - ms chip_en rise to resetn rise this delay is required to stabilize the xo clock before resetn removal. resetn must be driven high or low and must not be left floating. t a 0 - ms vddio fall to vbat fall vbat and vddio fall simultaneously or connected together. vbat must not fall before vddio. t b 0 - ms chip_en fall to vddio fall vddio must not fall before chip_en. chip_en and resetn must fall simultaneously. t c 0 - ms resetn fall to vddio fall vddio must not fall before resetn. resetn and chip_en fall simultaneously. 5.4 digital i/o pin behavior during power-up sequences the following table represents the digital i/o pin states corresponding to the device power modes. table 5-3.?digital i/o pin behavior in different device states device state vddio chip_en resetn output driver input driver pull up/down resistor (96 kohm) power_down: core supply off high low low disabled (hi-z) disabled disabled power-on reset: core supply and hard reset on high high low disabled (hi-z) disabled enabled power-on default: core supply on, device out of reset and not programmed high high high disabled (hi-z) enabled enabled on_doze/ on_transmit/ high high high programmed by firmware for each pin: enabled or disabled opposite of output driver state programmed by firmware for each pin: enabled or disabled ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 21
device state vddio chip_en resetn output driver input driver pull up/down resistor (96 kohm) on_receive: core supply on, device programmed by firmware ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 22
6. cpu and memory subsystems 6.1 processor this ATWILC1000-MR110XB module has a cortus aps3 32-bit processor. this processor performs many of the mac functions including but not limited to association, authentication, power management, security key management, and msdu aggregation/deaggregation. in addition, the processor provides flexibility for various modes of operation, such as sta and ap modes. 6.2 memory subsystem the aps3 core uses a 128 kb instruction/boot rom along with a 160 kb instruction ram and a 64 kb data ram. in addition, the device uses a 128 kb shared ram, accessible by the processor and mac that allows the aps3 core to perform various data management tasks on the tx and rx data packets. 6.3 nonvolatile memory (efuse) this ATWILC1000-MR110XB module has 768 bits of nonvolatile efuse memory that is read by the cpu after device reset. this nonvolatile one-time-programmable (otp) memory is used to store customer specific parameters, such as mac address; various calibration information, such as tx power, crystal frequency offset etc; and other software-specific configuration parameters. the efuse is partitioned into six 128 bit banks. each bank has the same bit map, mentioned in the following figure. the purpose of the first 80 bits in each bank is fixed, and the remaining 48 bits are general purpose software dependent bits. each bank is programmed independently, which allows for several updates of the device parameters following the initial programming. for example, if the mac address has to be changed, bank 1 has to be programmed with the new mac address along with the values of tx gain correction and frequency offset if they are used and programmed in the bank 0. the contents of bank 0 have to be invalidated in this case by programming the invalid bit in the bank 0. this will allow the firmware to use the mac address from bank 1. by default, all the atwilc1000-mr110pb and atwilc1000-mr110ub modules are programmed with the mac address and the frequency offset bits of bank 0. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 23
figure 6-1.?efuse bit map ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 24
7. wlan subsystem the wlan subsystem is composed of the media access controller (mac), physical layer (phy), and the radio. 7.1 mac 7.1.1 description this module is designed to operate at low power, while providing high data throughput. the ieee 802.11 mac functions are implemented with a combination of dedicated datapath engines, hardwired control logic, and a low power, high-efficiency microprocessor. the combination of dedicated logic with a programmable processor provides optimal power efficiency and real time response while providing the flexibility to accommodate evolving standards and future feature enhancements. the dedicated datapath engines are used to implement data path functions with heavy computational requirements. for example, a frame check sequence (fcs) engine checks the cyclic redundancy check (crc) of the transmitting and receiving packets, and a cipher engine performs all the required encryption and decryption operations for the wep, wpa-tkip, wpa2 ccmp-aes and wpa2 enterprise security requirements. control functions, which have real time requirements, are implemented using hardwired control logic modules. these logic modules offer real time response while maintaining configurability through the processor. examples of hardwired control logic modules are the channel access control module (implements edca/hcca, beacon tx control, interframe spacing, and so on), protocol timer module (responsible for the network access vector, back-off timing, timing synchronization function, and slot management), mac protocol data unit (mpdu) handling module, aggregation/deaggregation module, block ack controller (implements the protocol requirements for burst block communication), and tx/rx control finite state machine (fsm) (coordinate data movement between phy and mac interface, cipher engine, and the direct memory acces (dma) interface to the tx/rx fifos). following are the characteristics of mac functions implemented solely in software on the microprocessor: ? functions with high memory requirements or complex data structures. examples are association table management and power save queuing. ? functions with low computational load or without critical real time requirements. examples are authentication and association. ? functions that require flexibility and upgradeability. examples are beacon frame processing and qos scheduling. 7.1.2 features the ATWILC1000-MR110XB ieee 802.11 mac supports the following functions: ? ieee 802.11b/g/n ? ieee 802.11e wmm qos edca/pcf multiple access categories traffic scheduling ? advanced ieee 802.11n features: C transmission and reception of aggregated mpdus (a-mpdu) C transmission and reception of aggregated msdus (a-msdu) C immediate block acknowledgment C reduced interframe spacing (rifs) ? supports ieee 802.11i and wfa security with key management ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 25
C wep 64/128 C wpa-tkip C 128-bit wpa2 ccmp (aes) C wpa2 enterprise ? advanced power management C standard ieee 802.11 power save mode C wi-fi alliance wmm-ps (u-apsd) ? rts-cts and cts self support ? supports either sta or ap mode in the infrastructure basic service set mode ? supports concurrent mode of operation ? supports independent basic service set (ibss) 7.2 phy the ATWILC1000-MR110XB module wlan phy is designed to achieve reliable and power-efficient physical layer communication specified by ieee 802.11 b/g/n in single stream mode with 20 mhz bandwidth. the advanced algorithms are used to achieve maximum throughput in a real world communication environment with impairments and interference. the phy implements all the required functions such as fast fourier transform (fft), filtering, forward error correction (fec) that is a viterbi decoder, frequency, timing acquisition and tracking, channel estimation and equalization, carrier sensing, clear channel assessment and automatic gain control. features the ieee 802.11 phy supports the following functions: ? single antenna 1x1 stream in 20 mhz channels ? supports ieee 802.11b dsss-cck modulation: 1, 2, 5.5, and 11 mbps ? supports ieee 802.11g ofdm modulation: 6, 9, 12,18, 24, 36, 48, and 54 mbps ? supports ieee 802.11n ht modulations mcs0-7, 20 mhz, 800 and 400ns guard interval: 6.5, 7.2, 13.0, 14.4, 19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0, and 72.2 mbps ? ieee 802.11n mixed mode operation ? per packet tx power control ? advanced channel estimation/equalization, automatic gain control, cca, carrier/symbol recovery and frame detection 7.2.1 features the ieee 802.11 phy supports the following functions: ? single antenna 1x1 stream in 20 mhz channels ? supports ieee 802.11b dsss-cck modulation: 1, 2, 5.5, and 11 mbps ? supports ieee 802.11g ofdm modulation: 6, 9, 12,18, 24, 36, 48, and 54 mbps ? supports ieee 802.11n ht modulations mcs0-7, 20 mhz, 800 and 400ns guard interval: 6.5, 7.2, 13.0, 14.4, 19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0, and 72.2 mbps ? ieee 802.11n mixed mode operation ? per packet tx power control ? advanced channel estimation/equalization, automatic gain control, cca, carrier/symbol recovery and frame detection ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 26
7.3 radio this section describes the properties and characteristics of the atwilc1000- mr110xb and wi-fi radio transmit and receive performance capabilities of the device. the performance measurements are taken at the rf pin assuming 50 impedance; the rf performance is guaranteed for room temperature of 25c with a derating of 2-3db at boundary conditions. measurements were taken under typical conditions: vbatt at 3.3v; vddio at 3.3v ,and temperature at +25oc. table 7-1.?features and properties feature description module part number ATWILC1000-MR110XB wlan standard ieee 802.11b/g/n, wi-fi compliant host interface spi, sdio dimension l x w x h: 21.7 x 14.7 x 2.1 (typical) mm frequency range 2.412 ghz ~ 2.472 ghz (2.4 ghz ism band) number of channels 11 for north america, 13 for europe modulation 802.11b: dqpsk, dbpsk, cck 802.11g/n: ofdm/64-qam,16-qam, qpsk, bpsk data rate 802.11b: 1, 2, 5.5, 11 mbps 802.11g: 6, 9, 12, 18, 24, 36, 48, 54 mbps data rate (20 mhz ,short gi,400ns) 802.11n: 7.2, 14.4, 21.7, 28.9, 43.3, 57.8, 65,72.2 mbps operating temperature (1) -40c to 85c storage temperature -40c to 125c humidity operating humidity 10% to 95% non-condensing storage humidity 5% to 95% non-condensing note:? 1. rf performance is guaranteed at room temperature of 25c with a 2-3db change at boundary conditions. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 27
8. external interfaces this section describes the various host and debug interfaces of the ATWILC1000-MR110XB module. 8.1 interfacing with the host microcontroller this section describes how to interface ATWILC1000-MR110XB module with the host microcontroller. the interface comprises of a slave spi/sdio and additional control signals, as shown in the figure. additional control signals are connected to the gpio/irq interface of the microcontroller. figure 8-1.?interfacing with the host microcontroller table 8-1.?host microcontroller interface pins module pin function (1) 4 reset_n 11 wake 13 irq_n 22 chip_en 16 spi_ssn/sd_data1 15 spi_mosi/sd_data2 17 spi_miso/sd_data0 18 spi_sck/sd_cmd ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 28
module pin function (1) 14 sd_data3 19 sd_clk note:? 1. logic input for module pin sdio_spi_cfg(10) determines whether sdio or spi slave interface is enabled. connect sdio_spi_cfg to vddio through a 1m resistor to enable the spi interface. connect sdio_spi_cfg to ground to enable sdio interface. 2. it is recommended to place test points for pins i2c_sda(3), i2c_scl(2), gpio_3(25) and gpio_5(27) in the design. 8.2 spi slave interface the spi slave interface can be enabled by connecting the sdio_spi_cfg pin to vddio. this spi interface is used to exchange the control and 802.11 data. the spi is a full duplex slave-synchronous serial interface that is available following reset when pin 10 (sdio_spi_cfg) is connected to vddio. the spi interface pin mapping configuration is provided in the following table. table 8-2.?spi interface pin mapping pin # spi function 10 sdio_spi_cfg: must be connected to vddio 16 ssn: active-low slave select 15 mosi: serial data receive 18 sck: serial clock 17 miso: serial data transmit when the spi is not selected, i.e., when ssn is high, the spi interface will not interfere with data transfers between the serial master and other serial slave devices. when the serial slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the miso line. the spi interface responds to a protocol that allows an external host to read or write any register in the chip and also initiate dma transfers. the spi ssn, mosi, miso and sck pins of this module have internal programmable pull up resistors. these resistors are programmed to be disabled. otherwise, if any of the spi pins are driven to a low level while this module is in the low power sleep state, current will flow from the vddio supply through the pull up resistors, increasing the current consumption of the module. 8.3 sdio slave interface the sdio interface is enabled by connecting the sdio_spi_cfg pin to ground. this sdio interface is used to exchange the control and 802.11 data.. the sdio interface is available after reset when pin 10 (sdio_spi_cfg) is connected to ground. this sdio is a full speed interface. the interface supports the 1-bit/4-bit sd transfer mode at the clock range of 0-50 mhz. the host uses this interface to read and write from any register within the chip and also configures this module for dma data transfer. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 29
the sdio interface pin mapping configuration is provided in the following table. table 8-3.?atwilc1000 sdio interface pin mapping pin # sdio function 10 sdio_spi_cfg: must be connected to ground 14 dat3: data 3 15 dat2: data 2 16 dat1: data 1 17 dat0: data 0 18 cmd: command 19 clk: clock the sdio card is detected when the it is inserted into an sdio host. during the normal initialization and interrogation of the card by the host, the card identifies itself as an sdio device. the host software obtains the card information in a tuple (linked list) format and determines if that cards i/o function(s) are acceptable to activate. if the card is acceptable, it is allowed to power-up fully and start the i/o function(s) built into the card. the sd memory card communication is based on an advanced 9-pin interface (clock, command, four data and three power lines) designed to operate at maximum operating frequency of 50 mhz. 8.3.1 features ? compliant with sdio card specification version 2.0 ? host clock rate variable between 0 and 50 mhz ? supports 1-bit/4-bit sd bus modes ? allows card to interrupt host ? responds to direct read/write (io52) and extended read/write (io53) transactions ? supports suspend/resume operation 8.4 uart debug interface this module has a universal asynchronous receiver/transmitter (uart) interface on j25(rxd) and j27(txd) pins. this interface should be used only for debugging purposes. the uart is compatible with the rs-232 standard, where ATWILC1000-MR110XB operates as data terminal equipment (dte). it has a two-pin rxd/txd interface. the default configuration for accessing the uart interface of ATWILC1000-MR110XB is mentioned below: ? baud rate: 115200 ? data: 8 bit ? parity: none ? stop bit: 1 bit ? flow control: none it also has rx and tx fifos, which ensures reliable high speed reception and low software overhead transmission. fifo size is 4x8 for both rx and tx direction. the uart has status registers that show the ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 30
number of received characters available in the fifo and various error conditions; in addition, it has the ability to generate interrupts based on these status bits. an example of uart receiving or transmitting a single packet is shown in the following figure. this example shows 7-bit data (0x45), odd parity, and two stop bits. figure 8-2.?example of uart rx or tx packet 8.5 i 2 c slave interface this module provides an i 2 c bus slave that allows for easy debugging of the ATWILC1000-MR110XB devices. it supports i 2 c bus version 2.1 C 2000. the i 2 c interface is used only for debug. this interface is a two-wire serial interface consisting of a serial data line (sda, pin 17) and a serial clock (scl, pin 18). it responds to seven bit address value 0x60. this module i 2 c interface operates in standard mode (with data rates up to 100kb/s) and fast mode (with data rates up to 400kb/s). the i 2 c is a synchronous serial interface. the sda line is a bidirectional signal and changes only when the scl line is low, except for stop, start, and restart conditions. the output drivers are open- drain to perform wire and functions on the bus. the devices on the bus are limited to the 400pf capacitance. data is transmitted in byte packages. for specific information, refer to the philips specification entitled the i2c -bus specification, version 2.1. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 31
9. notes on interfacing with the ATWILC1000-MR110XB programmable pull up resistors the ATWILC1000-MR110XB module provides programmable pull up resistors on various pins. the purpose of these resistors is to keep any unused input pins from floating, which causes excess current to flow through the input buffer from the vddio supply. any unused pin on the device must leave these pull up resistors enabled, so that the pin will not float. the default state at power-up is for the pull up resistor to be enabled; however, any pin that is used must have the pull up resistor disabled. the reason for this is that if any pins are driven to a low level while the device is in the low power sleep state, current flows from the vddio supply through the pull up resistors, increasing the current consumption of the module. since the value of the pull up resistor is approximately 100 kohm, the current through any pull up resistor that is being driven low is vddio/100k. for vddio = 3.3v, the current is approximately 33 a. the pins that are used and have programmable the pull up resistor disabled should always be actively driven to either a high or low level and not be allowed to float. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 32
10. application reference design this section provides reference schematic for ATWILC1000-MR110XB module with spi and sdio host interfaces. figure 10-1.?ATWILC1000-MR110XB reference schetmatic - sdio host interface table 10-1.?ATWILC1000-MR110XB reference schematic - sdio host interface - bill of materials item qty. reference value descriptio n manufactu rer part number footprint 1 9 r2, r3, r4,r5, r6, r7, r8, r9, r10 0 r resistor ,thick film, 0 ohm, 0402 yageo rc0402jr -070rl 0402 2 1 u1 atwilc10 00- mr110xb wi-fi module microchip atwilc10 00- mr110xb ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 33
figure 10-2.?ATWILC1000-MR110XB reference schetmatic - spi host interface table 10-2.?ATWILC1000-MR110XB reference schematic - spi host interface - bill of materials item qty. reference value descriptio n manufactu rer part number footprint 1 1 r1 1 m resistor ,thick film, 1 m ohm, 0402 yageo rc0100fr -071ml 0402 2 9 r2, r3, r4,r5, r6, r7, r8, r9, r10 0 r resistor ,thick film, 0 ohm, 0402 yageo rc0402jr -070rl 0402 3 1 u1 atwilc10 00- mr110xb wi-fi module microchip atwilc10 00- mr110xb ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 34
11. module outline drawings the atwilc1000-mr110pb module package details are outlined in the following figure. dimensions are in mm. figure 11-1.?module drawings C atwilc1000-mr110pb - top, bottom and side views module top view metal shield metal shield pcb module side view module bottom view note : this pad must be soldered to gnd . not to scale the atwilc1000-mr110ub module package details are outlined in the following figure. dimensions are in mm. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 35
figure 11-2.?module drawings C atwilc1000-mr110ub - top, bottom and side views module top view metal shield metal shield pcb module side view module bottom view note : this pad must be soldered to gnd . not to scale rev . 2 this section provides the outline drawing for the recommended footprint for the ATWILC1000-MR110XB module. it is imperative that the center ground pad is provided, with an array of gnd vias to provide a good ground and act as thermal sink for the ATWILC1000-MR110XB module. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 36
figure 11-3.?recommended solder pad footprint note : this pad must be tied to gnd . 1 . 016 pitch 14 . 73 1 . 9 0 . 8 1 . 016 pitch 4 . 064 2 . 67 2 . 67 6 . 00 1 . 016 pitch 3 . 70 3 . 70 1 . 016 pitch 1 . 9 3 . 048 3 . 68 21 . 72 2 . 032 4 . 42 solder pad footprint drawing not to scale . untoleranced dimensions . units = mm . ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 37
12. design consideration this section provides the guidelines on placement and routing to achieve the best performance. 12.1 atwilc1000-mr110pb placement and routing guidelines it is critical to follow the recommendations listed below to achieve the best rf performance: ? the module must be placed on host board, the printed antenna area must overlap with the carrier board. the portion of the module containing the antenna should not stick out over the edge of the host board. the antenna is designed to work properly when it is sitting directly on top of a 1.5mm thick printed circuit board. figure 12-2 shows the best, poor and worst case module placements in host board. ? if the module is placed at the edge of the host board, a minimum 22mm by 5 mm area directly under the antenna must be clear of all metal on all layers of the board. in-land placement is acceptable; however, deepness of keep-out area must grove to: module edge to host board edge plus 5 mm. note:? do not place the module in the middle of the host board or far away from the host board edge. ? follow the module placement, keepout, host pcb cutout recommendation as shown in figure 12-1 C avoid routing any traces in the highlighted region on the top layer of the host board which will be directly below the module area. C follow the electrical keepout layer recommendation as shown in figure 12-1 . there should be no copper in all layers of the host board in this region. avoid placing any components (like mechanical spacers, bumpon etc) in the recommended electrical keepout area. C place gnd polygon pour below the module with the recommended boundary in the top layer of the host board as shown in figure 12-1 . do not have any breaks in this gnd plane. C place sufficient gnd vias in the highlighted area below the module for better rf performance. C it is recommended to have a 3x3 grid of gnd vias solidly connecting the exposed gnd paddle of the module to the inner layer ground plane. this will act as a good ground and thermal conduction for the atwilc1000-mr110pb module. the gnd vias should have a minimum via hole size of 0.3mm. C follow the mechanical boundary of the host pcb as shown in the figure 12-1 ? keep the large metal objects away from antenna to avoid electromagnetic field blocking. ? do not enclose the antenna within a metal shield. ? keep any components which may radiate noise or signals within the 2.4 ghz C 2.5 ghz frequency band away from the antenna and if possible, shield those components. any noise radiated from the host board in this frequency band will degrade the sensitivity of the module. ? make sure the width of the traces routed to gnd, vddio and vbat rails are sufficiently larger for handling the peak tx current consumption. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 38
figure 12-1.?atwilc1000-mr110pb placement reference figure 12-2.?atwilc1000-mr110pb placement example 12.2 printed pcb antenna performance of atwilc1000-mr110pb the printed pcb antenna on the atwilc1000-mr110pb is a meandered inverted f antenna (ifa). the antenna is fed via matching network, which is matched for the module installed on 1.5mm thick main board. main board thickness deviation by 1mm changes rx/tx performance by 1db maximum referring to rx/tx performance with default antenna matching network and installed on 1.5mm thick main board. measured antenna gain is -0.3dbi. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 39
antenna radiation pattern following figures illustrate the antenna radiation pattern. during the measurement, the printed antenna is placed in the xz plane with y axis being perpendicular to the module and pointing to the back of the module. figure 12-3.?antenna radiation pattern when phi = 0 degree figure 12-4.?antenna radiation pattern when phi = 90 degree ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 40
figure 12-5.?antenna radiation pattern when theta = 90 degree ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 41
12.3 atwilc1000-mr110ub placement and routing guidelines the atwilc1000-mr110ub module has an ultra small miniature rf connector (u.fl) for the external antenna. the choice of antenna is limited to the antenna types for which the module was tested and approved. for a list of tested and approved antennas that may be used with the module, refer to the respective country in the regulatory approval section. an approved and tested antenna type is shown in the following table. table 12-1.?tested external antenna type antenna type gain pcb antenna 2.0 dbi ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 42
12.3.1 recommended external antenna for atwilc1000-mr110ub pcb antenna (part number: w3525b039) along with a 10cm length rf cable assembly (u.fl to sma) has been used for the certification of atwilc1000-mr110ub. it is recommended to use the same or similar external antenna in design. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 43
13. reflow profile information this section provides the guidelines for the reflow process to get the module soldered to the customer's design. 13.1 storage condition 13.1.1 moisture barrier bag before opening a moisture barrier bag must be stored in a temperature of less than 30c with humidity under 85% rh. the calculated shelf life for the dry-packed product shall be 12 months from the date the bag is sealed. 13.1.2 moisture barrier bag open humidity indicator cards must be blue, indicating that the humidity is <30%. 13.2 solder paste snagcu eutectic solder with melting temperature of 217c is most commonly used for lead-free solder reflow application. this alloy is widely accepted in the semiconductor industry due to its low cost, relatively low melting temperature, and good thermal fatigue resistance. some recommended pastes include nc-smq ? 230 flux and indalloy ? 241 solder paste made up of 95.5 sn/3.8 ag/0.7 cu or senju n705-grn3360-k2-v type 3, no clean paste. 13.3 stencil design the recommended stencil is laser-cut, stainless-steel type with thickness of 100 m to 130 m and approximately a 1:1 ratio of stencil opening to pad dimension. to improve paste release, a positive taper with bottom opening 25 m larger than the top is utilized. local manufacturing experience may find other combinations of stencil thickness and aperture size to get good results. 13.4 printing process the printing process requires no significant changes compared to sn/pb solder. any guidelines recommended by the paste manufacturers to accommodate paste specific characteristics should be followed. post-print inspection and paste volume measurement is very critical to ensure good print quality and uniform paste. 13.5 baking conditions this module is rated at msl level 3. after the sealed bag is opened, no baking is required within 168 hours as long as the devices are held at 30c/60% rh or stored at < 10% rh. the module requires baking before mounting if: ? the sealed bag has been open for more than 168 hours ? the humidity indicator card reads more than 10% ? sips need to be baked for eight hours at 125c ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 44
13.6 soldering and reflow condition optimization of the reflow process is the most critical factor considered for lead-free soldering. the development of an optimal profile must account the paste characteristics, the size of the board, the density of the components, the mix of the larger and smaller components, and the peak temperature requirements of the components. an optimized reflow process is the key to ensuring a successful lead- free assembly and achieves high yield and long-term solder joint reliability. temperature profiling temperature profiling must be performed for all new board designs by attaching thermocouples at the solder joints, on the top surface of the larger components, and at multiple locations of the boards. this is to ensure that all components are heated to a temperature above the minimum reflow temperatures and the smaller components do not exceed the maximum temperature limit. the snagcu solder alloy melts at ~217c, so the reflow temperature peak at joint level must be 15 to 20c higher than melting temperature. the targeted solder joint temperature for the snagcu solder must be ~235c. for larger or sophisticated boards with a large mix of components, it is also important to ensure that the temperature difference across the board is less than 10 degrees to minimize board warpage. the maximum temperature at the component body must not exceed the msl3 qualification specification. 13.6.1 reflow oven it is strongly recommended that a reflow oven equipped with more heating zones and nitrogen atmosphere be used for lead-free assembly. nitrogen atmosphere has shown to improve the wet-ability and reduce temperature gradient across the board. it can also enhance the appearance of the solder joints by reducing the effects of oxidation. the following items should also be observed in the reflow process. 1. some recommended pastes include: C nc-smq ? 230 flux and indalloy ? 241 solder paste made up of 95.5 sn/3.8 ag/0.7 cu C senju n705-grn3360-k2-v type 3, no clean paste 2. allowable reflow soldering iterations: C three times based on the following reflow soldering profile (refer following figure). 3. temperature profile: C reflow soldering shall be done according to the following temperature profile (refer to the following figure). C peak temperature: 250c. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 45
figure 13-1.?solder reflow profile cleaning the exposed ground paddle helps to self-align the module, avoiding pad misalignment. the use of no- clean solder pastes is recommended. full drying of no-clean paste fluxes must be ensured as a result of the reflow process. this may require longer reflow profiles and/or peak temperatures toward the high end of the process window as recommended by the solder paste vendor. it is believed that uncured flux residues could lead to corrosion and/or shorting in accelerated testing and possibly the field. rework rework is to remove the mounted sip package and replace with a new unit. it is recommended that once an ATWILC1000-MR110XB module has been removed it should never be reused. during the rework process, the mounted module and pcb are heated partially, and the module is removed. it is recommended to heat-proof the proximity of the mounted parts and junctions and use the best nozzle for rework that is suited to the module size. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 46
14. module assembly considerations the ATWILC1000-MR110XB modules are assembled with an emi shield to ensure compliance with emi emission and immunity rules. the emi shield is made of a tin-plated steel (spte) and is not hermetically sealed. solutions like ipa and similar solvents can be used to clean the ATWILC1000-MR110XB module; however, cleaning solutions that contain acid should never be used on the module. the ATWILC1000-MR110XB modules are manufactured without any conformal coating applied. it is the customers responsibility if a conformal coating is specified and applied to the atwilc1000- mr110xb module. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 47
15. regulatory approval regulatory approvals received: atwilc1000-mr110pb ? united states/fcc id: 2adhkatwilc1000 ? canada/ised C ic: 20266-atwilc1000 C hvin: atwilc1000-mr110pb ? europe - ce atwilc1000-mr110ub ? united states/fcc id: 2adhkatwilc1000u 15.1 united states the atwilc1000-mr110pb and atwilc1000-mr110ub modules have received federal communications commission (fcc) cfr47 telecommunications, part 15 subpart c intentional radiators single-modular approval in accordance with part 15.212 modular transmitter approval. single- modular transmitter approval is defined as a complete rf transmission sub-assembly, designed to be incorporated into another device, that must demonstrate compliance with fcc rules and policies independent of any host. a transmitter with a modular grant can be installed in different end-use products (referred to as a host, host product, or host device) by the grantee or other equipment manufacturer, then the host product may not require additional testing or equipment authorization for the transmitter function provided by that specific module or limited module device. the user must comply with all of the instructions provided by the grantee, which indicate installation and/or operating conditions necessary for compliance. a host product itself is required to comply with all other applicable fcc equipment authorization regulations, requirements, and equipment functions that are not associated with the transmitter module portion. for example, compliance must be demonstrated: to regulations for other transmitter components within a host product; to requirements for unintentional radiators (part 15 subpart b), such as digital devices, computer peripherals, radio receivers, etc.; and to additional authorization requirements for the non-transmitter functions on the transmitter module (i.e., verification or declaration of conformity) as appropriate (e.g., bluetooth and wi-fi transmitter modules may also contain digital logic functions). 15.1.1 labeling and user information requirements the atwilc1000-mr110pb and atwilc1000-mr110ub modules have been labeled with their own fcc id numbers. if the fcc id is not visible when the module is installed inside another device, then the outside of the finished product into which the module is installed must display a label referring to the enclosed module. this exterior label can use wording as follows: for the atwilc1000-mr110pb: contains transmitter module fcc id: 2adhkatwilc1000 or contains fcc id: 2adhkatwilc1000 this device complies with part 15 of the fcc rules. operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 48
for the atwilc1000-mr110ub: contains transmitter module fcc id: 2adhkatwilc1000u or contains fcc id: 2adhkatwilc1000u this device complies with part 15 of the fcc rules. operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. a user's manual for the finished product should include the following statement: this equipment has been tested and found to comply with the limits for a class b digital device, pursuant to part 15 of the fcc rules. these limits are designed to provide reasonable protection against harmful interference in a residential installation. this equipment generates, uses and can radiate radio frequency energy, and if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. however, there is no guarantee interference will not occur in a particular installation. if this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: ? reorient or relocate the receiving antenna ? increase the separation between the equipment and receiver ? connect the equipment into an outlet on a circuit different from that to which the receiver is connected ? consult the dealer or an experienced radio/tv technician for help additional information on labeling and user information requirements for part 15 devices can be found in kdb publication 784748, which is available at the fcc office of engineering and technology (oet) laboratory division knowledge database (kdb) https://apps.fcc.gov/oetcf/kdb/index.cfm 15.1.2 rf exposure all transmitters regulated by fcc must comply with rf exposure requirements. kdb 447498 general rf exposure guidance provides guidance in determining whether proposed or existing transmitting facilities, operations or devices comply with limits for human exposure to radio frequency (rf) fields adopted by the federal communications commission (fcc). from the fcc grant: output power listed is conducted. this transmitter is restricted for use with the specific antenna(s) tested in this application for certification. in the end product, the antenna(s) used with this transmitter must be installed to provide a separation distance of at least 6.5 cm from all persons and must not be co-located or operation in conjunction with any other antenna or transmitter. user and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying the rf exposure compliance. 15.1.3 approved antenna types to maintain modular approval in the united states, only the antenna types that have been tested shall be used. it is permissible to use a different antenna, provided the same antenna type and antenna gain (equal to or less than) is used. an antenna type comprises antennas having similar in-band and out-of- band radiation patterns. testing the atwilc1000-mr110ub module was performed with the antenna types listed in table 12-1 . ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 49
15.1.4 helpful websites federal communications commission (fcc): http://www.fcc.gov fcc office of engineering and technology (oet) laboratory division knowledge database (kdb): https://apps.fcc.gov/oetcf/kdb/index.cfm 15.2 canada the atwilc1000-mr110pb module has been certified for use in canada under innova- tion, science and economic development canada (ised, formerly industry canada) radio standards procedure (rsp) rsp-100, radio standards specifi- cation (rss) rss-gen and rss-247. modular approval permits the installation of a module in a host device without the need to recertify the device. 15.2.1 labeling and user information requirements label requirements (from rsp-100 issue 11, section 3): the host device shall be properly labeled to identify the module within the host device. the innovation, science and economic development canada certification label of a module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labeled to display the innovation, science and economic development canada certification number of the module, preceded by the words contains, or similar wording expressing the same meaning, as follows: for the atwilc1000-mr110pb: contains ic: 20266-atwilc1000 user manual notice for license-exempt radio apparatus (from section 8.4 rss-gen, issue 4, november 2014): user manuals for license-exempt radio apparatus shall contain the following or equivalent notice in a conspicuous location in the user manual or alternatively on the device or both: this device complies with industry canada license exempt rss standard(s). operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. le prsent appareil est conforme aux cnr d'industrie canada applicables aux appareils radio exempts de licence. l'exploitation est autorise aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radiolectrique subi, mme si le brouillage est susceptible d'en compromettre le fonctionnement. guidelines on transmitter antenna for license exempt radio apparatus: under industry canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by industry canada. to reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. conformment la rglementation d'industrie canada, le prsent metteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou infrieur) approuv pour ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 50
l'metteur par industrie canada. dans le but de rduire les risques de brouillage radiolectrique l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonne quivalente (p.i.r.e.) ne dpasse pas l'intensit ncessaire l'tablisse-ment d'une communication satisfaisante. 15.2.2 rf exposure all transmitters regulated by innovation, science and economic development canada (ised) must comply with rf exposure requirements listed in rss-102 - radio frequency (rf) exposure compliance of radio communication apparatus (all frequency bands). this transmitter is restricted for use with a specific antenna tested in this application for certification, and must not be co-located or operating in conjunction with any other antenna or transmitters within a host device, except in accordance with canada multi-transmitter product procedures. the installation of the transmitter must ensure that the antenna has a separation distance of at least 6.5 cm from all persons or compliance must be demonstrated according to the ised sar procedures. 15.2.3 canada_helpful websites innovation, science and economic development canada: http://www.ic.gc.ca/ 15.3 europe the atwilc1000-mr110pb module is radio equipment directive (red) assessed radio module that is ce marked and have been manufactured and tested with the intention of being integrated into a final product. the atwilc1000-mr110pb module has been tested to red 2014/53/eu essential requirements for health and safety (article (3.1(a)), electromagnetic compatibility (emc) (article 3.1(b)), and radio (article 3.2), and are summarized in table 15-1 . the etsi provides guidance on modular devices in guide to the application of harmonised standards covering articles 3.1b and 3.2 of the red 2014/53/eu (red) to multi-radio and combined radio and non- radio equipment document available at http://www.etsi.org/deliver/etsi_eg/203300_203399/20 3367/01.01.01_60/eg_203367v010101p.pdf . note:? to maintain conformance to the testing listed in table 15-1 , the module shall be installed in accordance with the installation instructions in this data sheet and shall not be modified. when integrating a radio module into a completed product, the integrator becomes the manufacturer of the final product and is therefore responsible for demonstrating compliance of the final product with the essential requirements against the red. 15.3.1 labeling and user information requirements the label on the final product which contains the atwilc1000-mr110pb module must follow ce marking requirements. table 15-1.?european compliance testing - atwilc1000-mr110pb certification standards article laboratory report number date safety en60950-1:2006/a11:2009/ a1:2010/ a12:2011/a2:2013 [3.1(a)] tuv rheinland, 10061532 001 11 aug 2017 ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 51
certification standards article laboratory report number date taiwan health en300 328 v2.1.1 en62311:2008 50092557 001 11 aug 2017 emc en 301 489-1 v2.1.1 en 301 489-1 v2.2.0 [3.1(b)] 10060032 001 11 aug 2017 en 301 489-17 v3.1.1 en 301 489-17 v3.2.0 radio en300 328 v2.1.1 (3.2) 50092557 001 11 aug 2017 15.3.2 conformity assessment from etsi guidance note eg 203367, section 6.1 non-radio products are combined with a radio product: if the manufacturer of the combined equipment installs the radio product in a host non-radio product in equivalent assessment conditions (i.e. host equivalent to the one used for the assessment of the radio product) and according to the installation instructions for the radio product, then no additional assessment of the combined equipment against article 3.2 of the red is required. the european compliance testing listed in table 15-1 was performed using the integral pcb antenna. 15.3.3 simplified eu declaration of conformity hereby, microchip technology inc. declares that the radio equipment type atwilc1000-mr110pb is in compliance with directive 2014/53/eu. the full text of the eu declaration of conformity is available at the following webpage: http:// www.microchip.com/design-centers/wireless-connectivity 15.3.4 helpful websites a document that can be used as a starting point in understanding the use of short range devices (srd) in europe is the european radio communications committee (erc) recommendation 70-03 e, which can be downloaded from the european communications committee (ecc) at: http://www.ecodocdb.dk/ . additional helpful web sites are: ? radio equipment directive (2014/53/eu): https://ec.europa.eu/growth/single-market/european-standards/harmonised-standards/rtte_en ? european conference of postal and telecommunications administrations (cept): http://www.cept.org ? european telecommunications standards institute (etsi): http://www.etsi.org ? the radio equipment directive compliance association (redca): http://www.redca.eu/ ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 52
16. reference documentation the following table provides the set of collateral documents to ease integration and device ramp. table 16-1.?reference documents title content wi-fi link controller linux user guide getting started package, which includes: quick start guide, hardware limitations and notes, and software quick start guidelines. wi-fi link controller linux porting guide this user guide describes how to port the atwilc1000 and atwilc3000 linux drivers to another platform and contains all the required modifications for driver porting. note:? for a complete listing of development support tools and documentation, visit http://www.microchip.com/ wwwproducts/en/atwilc1000 or refer to the customer support section on options to the nearest microchip field representative. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 53
17. document revision history rev b - 10/2017 section changes mac features editorial updates rev a - 08/2017 section changes document ? updated from atmel to microchip template. ? assigned a new microchip document number. previous version is atmel 42503 revision c. ? isbn number added. ? updated module reference to atwilc1000- mr110xb throughout the document. ? removed reference to bluetooth coexistence ? added wfa certification details ? updated block diagram figure 2-1 ? updated pin description in table 3-1 ? updated vddio absolute maximum volatge rating in table 4-1 and added caution footnote ? added operating temperature to table 4-2 ? moved transmitter performance , receiver performance and timing characteristics under electrical specifications ? updated description in nonvolatile memory (efuse) ? revised the transmitter performance and receiver performance ? updated application reference design ? added design consideration ? updated reference documentation rev c - 11/2016 section changes document ? updated the device pinout drawing figure 3-1 to make it easier to read ? added section 11.5 regarding pcba coatings ? updated marking diagram in figure 1-1 ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 54
section changes ? revised values for transmit power and added notes in table 4-4 ? added pins and agencies to ordering information in table 1-1 ? added section atwilc1000-mr110ub placement and routing guidelines types for atwilc1000-mr110ub ? added certification notices ? added regulatory approval ? updated description to indicate both the mr110pb and mr110ub are covered ? removed "with seamless roaming capabilities" from description ? revised features to only support spi and sdio hosts. ? removed references to wapi ? removed uart ? moved solder pad drawing to be with pod drawings as in figure 11-1 ? minor edits rev b - 5/2016 section changes document ? revised pod drawings in module outline drawings ? revised footprint drawing in module outline drawings ? removed module schematics and boms ? added reflow profile reflow profile information ? updated sdio timing content in sdio slave timing ? added footnotes to recommended operating ratings in recommended operating conditions ? updated spi timing content in spi slave timing rev a - 8/2015 section changes document updated due to changes from atwilc100a(42380d) to atwilc1000b: ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 55
section changes ? updated power numbers and description, added high-power and low-power modes ? updated radio performance numbers ? fixed typos in spi interface timing ? added hardware accelerators in feature list (security and checksum) ? increased instruction ram size from 128kb to 160kb ? improved and corrected description of coexistence interface ? miscellaneous minor updates and corrections ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 56
the microchip web site microchip provides online support via our web site at http://www.microchip.com/ . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support C data sheets and errata, application notes and sample programs, design resources, users guides and hardware support documents, latest software releases and archived software ? general technical support C frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip C product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchips customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at http://www.microchip.com/ . under support, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://www.microchip.com/support microchip devices code protection feature note the following details of the code protection feature on microchip devices: ? microchip products meet the specification contained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specifications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 57
? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. legal notice information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose. microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, avr, avr logo, avr freaks, beaconthings, bitcloud, cryptomemory, cryptorf, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, kleer, lancheck, link md, maxstylus, maxtouch, medialb, megaavr, most, most logo, mplab, optolyzer, pic, picopower, picstart, pic32 logo, prochip designer, qtouch, righttouch, sam-ba, spynic, sst, sst logo, superflash, tinyavr, uni/o, and xmega are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microchip technology incorporated in the u.s.a. adjacent key suppression, aks, analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, cryptoauthentication, cryptocompanion, cryptocontroller, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, mindi, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, qmatrix, righttouch logo, real ice, ripple blocker, sam-ice, serial quad i/o, smart-i.s., sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademark of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2017, microchip technology incorporated, printed in the u.s.a., all rights reserved. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 58
isbn: 978-1-5224-2223-5 quality management system certified by dnv iso/ts 16949 microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, keeloq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. ATWILC1000-MR110XB ? 2017 microchip technology inc. datasheet ds70005326b-page 59
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